Careers

Join the team building ultra-efficient GenAI acceleration

Join RaiderChip

RaiderChip makes ultra-efficient Generative AI acceleration hardware and the software stack around it.

We are looking for engineers:

  • with a high-level of Python/C (for Software positions), or VHDL/Verilog (for Hardware positions)
  • knowledge of AI/ML is a plus, but not mandatory, we will teach you everything.

We’d love to hear from you.

Get in touch: careers@raiderchip.ai

Software

Compilers, runtimes, and performance tooling for running AI workloads, from edge to cloud.

You will help develop the compilers, runtimes, and performance tooling that make our hardware easy to adopt and fast in production.

Open positions
  • Senior Software Engineer On-Site (Solares, Spain) • Full-time
    Requirements:
    • Mandatory expert-level Python and C
    • Minimum 8 years of professional software development experience
    • Design, implement, and maintain high-quality software components
    • Write efficient, clean, and maintainable code
    • Collaborate with hardware and systems teams
    • Ability to work independently and deliver reliably
    Apply
  • Software Team Lead On-Site (Solares, Spain) • Full-time
    Requirements:
    • Mandatory expert-level Python and C
    • Senior profile with >10 years of professional software experience
    • Lead and mentor a team of software engineers
    • Maintain hands-on involvement in coding and architecture
    • Enforce code quality, best practices, and technical standards
    • Review designs, pull requests, and critical implementations
    • Proven ability to balance leadership and deep technical work
    Apply

Hardware

Architecture, FPGA prototyping, ASIC implementation, verification, and bring-up.

You will help build the compute engines that power our NPUs: architecture exploration, FPGA prototyping, ASIC implementation, verification, and silicon bring-up.

Open positions
  • ASIC Backend Engineer On-Site (Solares, Spain) • Full-time
    Requirements:
    • Own the technical oversight of ASIC back-end executed by design service partners
    • Review, challenge, and validate P&R, timing closure, DRC/LVS, and sign-off results
    • Define and review backend constraints and deliverables
    • Strong understanding of physical design flows and trade-offs
    • Working experience with Synopsys tools • Proven experience with full ASIC tapeouts (strong plus)
    Apply
  • ASIC Verification Engineer On-Site (Solares, Spain) • Full-time
    Requirements:
    • Develop and execute comprehensive verification strategies for ASIC designs
    • Create simulation environments to aggressively validate functionality
    • Leverage existing FPGA-proven designs as reference and validation baseline
    • Strong experience with RTL simulation and verification methodologies
    • Working experience with Synopsys tools
    Apply
  • FPGA Engineer (Prototyping) On-Site (Solares, Spain) • Full-time
    Requirements:
    • Use FPGA emulation to stress, debug, and validate ASIC-designs
    • Leverage long-running, proven FPGA prototypes as functional reference
    • Validate functionality through SW simulation and HW emulation
    • Collaborate closely with ASIC frontend and verification engineers
    • Drive issue detection, root-cause analysis, and fix validation
    • Strong experience with RTL simulation and FPGA toolchains (AMD/Xilinx)
    Apply

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